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data sheet 1 rev. 1.1 www.infineon.com/power 2017-03-30 BTS50010-1TAD smart high-side power switch 1 overview features ? one channel device ?low stand-by current ?3.3v to v s level capable input pin ? electrostatic discharge protection (esd) ? optimized electromagne tic compatibility (emc) ? logic ground independent from load ground ? very low leakage current at out pin ? compatible to cranking pulse re quirement (test pulse 4 of iso 7637 and cold start pulse in lv124) ? embedded diagnostic functions ? embedded protection functions ? green product (rohs compliant) ? aec qualified applications ? suitable for resistive, induc tive and capacitive loads ? replaces electromechanical rela ys, fuses and discrete circuits ? most suitable for applications with high current loads, such as heat ing system, main switch for power distribution, start-stop power supply switch ? pwm applications with low frequencies description the BTS50010-1TAD is a 1.0 m ? single channel smart high-side powe r switch, embedded in a pg-to-263-7- 10 package, providing protective function s and diagnosis. it contains infineon ? reversave? functionality. the power transistor is built by a n-channel power mosfet wi th charge pump. it is spec ially designed to drive high current loads up to 80 a, for applications like switched battery couplings, power distribution switches, heaters, glow plugs, in the harsh automotive environment.
data sheet 2 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch overview embedded diagnostic functions ? proportional load current sense ? short circuit / overtemperature detection ? latched status signal after short circuit or overtemperature detection embedded protection functions ?infineon ? reversave?: reverse battery protection by self turn on of power mosfet ?infineon ? inversave: inverse operation robustness capability ? secure load turn-off while de vice loss of gnd connection ? overtemperature protection with latch ? short circuit protection with latch ? overvoltage protection with external components ? enhanced short circuit operation ?infineon ? smart clamping table 1 product summary parameter symbol values operating voltage range v s(op) 8v ? 18v extended supply voltage including dynamic undervoltage capability v s(dyn) 3.2 v ? 28 v maximum on-state resistance ( t j = 150c) r ds(on) 2m ? minimum nominal load current ( t a = 85c) i l(nom) 40 a typical current sense differential ratio d k ilis 52100 minimum short circuit current threshold i cl(0) 150 a maximum stand-by current for th e whole device with load ( t a = t j = 85c) i vs (off) 18 a maximum reverse battery voltage ( t a = 25c for 2 min) -v s(rev) 16 v type package marking BTS50010-1TAD pg-to-263-7-10 s50010d
data sheet 3 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 list of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 list of figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.2 pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.3 voltage and current definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 general product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.2 functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.3 thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.1 power stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.1.1 output on-state resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.1.2 switching resistive loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.1.3 switching inductive loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.1.3.1 output clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.1.3.2 maximum load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.1.4 switching active loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.1.5 inverse current capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.1.6 pwm switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.1.7 advanced switch-off behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.2 input pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.2.1 input circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.2.2 input pin voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.3 protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.3.1 loss of ground protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.3.2 protection during lo ss of load or loss of v s condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.3.3 undervoltage behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.3.4 overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.3.5 reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.3.6 overload protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.3.6.1 activation of the switch into short circuit (short circuit type 1) . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.3.6.2 short circuit appearance when the device is alread y on (short circuit type 2) . . . . . . . . . . . . 26 5.3.6.3 influence of the battery wire induc tance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.3.7 temperature limitation in the power dmos . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.4 diagnostic functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.4.1 is pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.4.2 sense signal in different operation modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.4.3 sense signal in the nominal current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.4.3.1 sense signal variation and calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.4.3.2 sense signal timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 table of contents
data sheet 4 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch 5.4.3.3 sense signal in ca se of short circuit to v s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 5.4.3.4 sense signal in case of over load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 6 electrical characteristics BTS50010-1TAD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 6.1 electrical characteristics table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 6.2 typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 7 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 7.1 further application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 8 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
data sheet 5 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch table 1 product summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 table 2 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 3 functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 4 thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 5 sense signal, function of operation mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 6 electrical characteristics: bts50010-1t ad . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 table 7 bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 list of tables
data sheet 6 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch figure 1 block diagram for the BTS50010-1TAD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 2 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 3 voltage and current definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 4 maximum single pulse current vs. pulse time, t j 150c, t pin = 85c . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5 maximum energy dissipati on for inductive switch off, e a vs. i l at v s = 13.5 v . . . . . . . . . . . . . . . . 13 figure 6 maximum energy dissipation repetitive pulse temperature derating . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7 typical transient thermal impedance z th(ja) = f(time) for different pcb conditions . . . . . . . . . . 15 figure 8 switching a resistive load: timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 9 output clamp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 10 switching an inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 11 boundary conditions for switching active loads at low v s with low initial v ds voltage. . . . . . . . . 18 figure 12 inverse current circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 13 inverse behavior - timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 14 switching in pwm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 15 input pin circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 16 diagram of diagnosis & protection block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 17 loss of ground protection with ex ternal components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 18 loss of v s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 19 loss of load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 20 undervoltage behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 21 overvoltage protection with external components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 22 reverse polarity protection with external components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 23 oscillations at vs pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 24 consecutive short circuit events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 25 rc snubber circuits: between vs pin and modul e gnd; between vs pin and device gnd . . . . . 28 figure 26 overload protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 27 diagnostic block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 28 current sense for nominal and overload condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 29 improved current sense accuracy after 2-point calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 30 fault acknowledgement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 figure 31 application diagram with BTS50010-1TAD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 figure 32 pg-to-263-7-10 (rohs-compliant). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 list of figures
data sheet 7 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch block diagram 2 block diagram figure 1 block diagram for the BTS50010-1TAD blockdiagram v s out in driver logic gate control & charge pump load current sense over temperature smart clamp over current switch off voltage sensor gnd esd protection is internal power supply r vs
data sheet 8 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch pin configuration 3 pin configuration 3.1 pin assignment figure 2 pin configuration 3.2 pin definitions and functions pin symbol function 1gnd ground; signal ground 2in input; digital signal to switch on channel (?high? active) 3is sense; analog/digital signal for diag nosis, if not used: left open 4, cooling tab vs supply voltage; battery voltage 5, 6, 7 out output; protected high side power output channel 1) 1) all output pins are internally connecte d and they also have to be connected together on the pcb. not shorting all outputs on pcb will considerably increase the on-state resistance and decrease the current sense / overcurrent tripping accuracy. pcb traces have to be designed to withstan d the maximum current. 123 4 57 6
data sheet 9 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch pin configuration 3.3 voltage and current definition figure 3 shows all terms used in this data sheet, with associated convention for positive values. figure 3 voltage and current definition in is gnd out i in i is v s v in v is i vs i gnd v ds v out i out v b , is v s
data sheet 10 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch general product characteristics 4 general product characteristics 4.1 absolute maximum ratings table 2 absolute maximum ratings 1) t j = -40c to +150c; (unless otherwise specified) parameter symbol values unit note or test condition number min. typ. max. supply voltages supply voltage v s -0.3 ? 28 v ? p_4.1.1 reverse polarity voltage -v s(rev) 0?16 v 2) t <2 min t a = 25c r l 0.5 ? p_4.1.2 load dump voltage v bat(ld) ??45 v 3) r i =2 ? r l =2.2 ? r is =1k ? r in =4.7k ? p_4.1.5 short circuit capability supply voltage for short circuit protection v s(sc) 5?20 v 4) r ecu =20m ? l ecu =1h r cable =6m ? /m l cable =1h/m l =0 to 5m r, c as shown in figure 31 see chapter 5.3 p_4.1.3 short circuit is permanent: in pin toggles short circuit (sc type 1) n rsc1 ??1 million (grade a) ? 5) p_4.1.4 gnd pin current through gnd pin i gnd -15 ? 6) ? ? 10 7) 15 ma ? t 2min p_4.1.6 input pin voltage at in pin v in -0.3 ? v s v? p_4.1.7 current through in pin i in -5 -5 ? ? 5 50 6) ma ? t 2min p_4.1.8 maximum retry cycle rate in fault condition f fault ??1 hz? p_4.1.9
data sheet 11 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch general product characteristics sense pin voltage at is pin v is -0.3 ? v s v? p_4.1.10 current thro ugh is pin i is -15 ? 6) ? ? 10 7) 15 ma ? t 2min p_4.1.11 power stage maximum energy dissipation by switching off inductive load single pulse over lifetime e as ? ? 3000 mj v s = 13.5 v i l = i l(nom) = 40a t j(0) 150c see figure 5 p_4.1.12 maximum energy dissipation repetitive pulse e ar ? ? 460 mj 8) v s = 13.5 v i l = i l(nom) = 40a t j(0) 105c see figure 5 p_4.1.13 maximum energy dissipation repetitive pulse e ar ? ? 235 mj 8) v s = 13.5 v i l = 80a t j(0) 105c see figure 5 p_4.1.14 average power dissipation p tot ? ? 200 w t c = -40c to 150c p_4.1.15 voltage at out pin v out -64 ? ? v ? p_4.1.21 temperatures junction temperature t j -40 ? 150 c ? p_4.1.16 dynamic temperature increase while switching ? t j ??60 ksee chapter 5.3 p_4.1.17 storage temperature t stg -55 ? 150 c ? p_4.1.18 esd susceptibility esd susceptibility (all pins) v esd(hbm) -2 ? 2 kv hbm 9) p_4.1.19 esd susceptibility out pin vs. gnd / v s v esd(hbm) -4 ? 4 kv hbm 9) p_4.1.20 1) not subject to production test, specified by design. 2) the device is mounted on a fr4 2s2p board accord ing to jedec jesd51-2,-5,-7 at natural convection. 3) v s(ld) is setup without dut connected to the generator per iso 7637-1. 4) in accordance to aec q100- 012, figure-1 test circuit. 5) in accordance to aec q100-012, chap ter 3 conditions. short circuit condit ions deviating from aec q100-012 may influence the specified short circui t cycle number in the data sheet. 6) the total reverse current (sum of i gnd , i is and -i in ) is limited by -v s(rev)_max and r vs . 7) t c 125c 8) setup with repetitive ear and superimp osed tc conditions (like aec-q100-ptc, 10 6 pulses with e e ar , 10 3 passive temperature cycles), parameter drift within datasheet limits possible 9) esd susceptibility, hbm accord ing to ansi/esda/jedec js-001. table 2 absolute maximum ratings 1) (cont?d) t j = -40c to +150c; (unless otherwise specified) parameter symbol values unit note or test condition number min. typ. max.
data sheet 12 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch general product characteristics notes 1. stresses above the ones listed he re may cause permanent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. integrated protection functions are designed to preven t ic destruction under fault conditions described in the data sheet. fault conditions are considered as ?outsi de? normal operating range. protection functions are not designed for continuous repetitive operation. figure 4 maximum single pulse current vs. pulse time, t j 150c, t pin =85c note: above diagram shows the maximum single pulse current that can be maintained by the internal power stage bond wires for a given pulse time t pulse . the maximum reachable current may be smaller depending on the device current limitati on level. the maximum reachable pulse time may be shorter due to thermal protection of the device. t pin is the temperature of pins 5, 6 and 7. 0 50 100 150 200 250 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 i l,max [a] t p ulse [sec]
data sheet 13 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch general product characteristics figure 5 maximum energy dissipati on for inductive switch off, e a vs. i l at v s = 13.5 v figure 6 maximum energy dissipation re petitive pulse temperature derating 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0 20 40 60 80 100 120 140 e a [j] eas - tj(0)<150c ear - tj(0)<105c 0% 20% 40% 60% 80% 100% 100 110 120 130 140 150 e ar derating t j(0) [c]
data sheet 14 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch general product characteristics 4.2 functional range note: within the functional or operatin g range, the ic operates as descri bed in the circuit description. the electrical characteristics are specified within the co nditions given in the el ectrical characteristics table. table 3 functional range parameter symbol values unit note or test condition number min. typ. max. supply voltage range for nominal operation v s(nom) 8?18v? p_4.2.1 supply voltage range for extended operation v s(ext) 5.3 ? 28 v 1) v in 2.2 v i l i l(nom) t j 25c parameter deviations possible 1) not subject to production test. specified by design p_4.2.2 v s(ext) 5.5 ? 28 v 1) v in 2.2 v i l i l(nom) t j = 150c parameter deviations possible supply voltage range for extended operation dynamic undervoltage capability v s(ext,dyn) 3.2 2) 2) t a = 25c; r l = 0.5 ? ; pulse duration 6 ms; cranking capability is depending on load and must be verified under application conditions ?? v 1) acc. to iso 7637 p_4.2.3 supply undervoltage shutdown v s(uv) ??4.5v 1) v in 2.2 v r l = 270 ? v s decreasing see figure 20 p_4.2.4 slewrate at out |d v ds /d t |? ? 10 v/s 1) | v ds |<3v see chapter 5.1.4 p_4.2.7 slewrate at out |d v ds /d t |? ? 0.2 v/s 1) v s(ext) < v s <8v 0< v ds <1v t < t on(delay) see chapter 5.1.4 p_4.2.8
data sheet 15 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch general product characteristics 4.3 thermal resistance note: this thermal data was generated in accord ance with jedec jesd51 standards. for more information, go to www.jedec.org . figure 7 is showing the typical therma l impedance of BTS50010-1TAD moun ted according to jedec jesd51- 2,-5,-7 at natural convection on fr4 1s0p and 2s2p boards. figure 7 typical transient thermal impedance z th(ja) = f(time) for different pcb conditions table 4 thermal resistance parameter symbol values unit note or test condition number min. typ. max. junction to case r thjc ??0.5k/w 1) 1) not subject to production test, specified by design. p_4.3.1 junction to ambient r thja(2s2p) ?20?k/w 1)2) 2) specified r thja value is according to jedec jesd51-2,-5,-7 at na tural convection on fr4 2s2p board; the product (chip+package) was simulated on a 76.2114.31.5 mm board with 2 inner copper layers (270m cu, 235m cu). where applicable a thermal via array under the exposed pad contacted the fi rst inner copper layer. t a = 25c. device is dissipating 2 w power. p_4.3.2 junction to ambient r thja ?70?k/w 1)3) 3) specified r thja value is according to jedec jesd51-2,-5,-7 at na tural convection on fr4 1s0p board; the product (chip+package) was simulated on a 76.2 114.3 1.5 mm board with only one top copper layer 1 70 m. t a =25c. device is dissipating 2 w power. p_4.3.3 0.01 0.1 1 10 100 0.0001 0.001 0.01 0.1 1 10 100 1000 z th(ja) [k/w] t pulse [sec] jedec 1s0p / 600mm2 jedec 1s0p / 300mm2 jedec 1s0p / footprint jedec 2s2p
data sheet 16 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description 5 functional description 5.1 power stage the power stage is built by a n-channel power mosfet (dmos) with charge pump. 5.1.1 output on-state resistance the on-state resistance r ds(on) depends on the supply voltage as well as the junction temperature t j . page 42 shows the dependencies in terms of temperature and su pply voltage, for the typical on-state resistance. the behavior in reverse polarity is described in chapter 5.3.5 . a high signal (see chapter 5.2 ) at the input pin causes the power dmos to switch on with a dedicated slope, which is optimized in terms of emc emission. 5.1.2 switching resistive loads figure 8 shows the typical timing when switching a resist ive load. the power stage has a defined switching behavior. defined slew rates results in lowest emc emission at minimum switching losses. figure 8 switching a resistive load: timing 5.1.3 switching inductive loads 5.1.3.1 output clamping when switching off inductive loads wi th high side switches, the voltage v out drops below ground potential, because the inductance intends to co ntinue driving the current . to prevent the destruction of the device due to high voltages, there is a infineon ? smart clamping mechanism implem ented that keeps negative output voltage to a certain level ( v s - v ds(cl) ). please refer to figure 9 and figure 10 for details. nevertheless, the maximum allowed load indu ctance remains limited. v out 50% v s 25% v s 10% v s 90% v s v out i out i out v in v in t off(delay) t off t on(delay) t on d v on / d t d v off / d t
data sheet 17 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description figure 9 output clamp figure 10 switching an inductance the BTS50010-1TAD provides infineon ? smart clamping functionality. to increase the energy capability, the clamp voltage v ds(cl) increases with ju nction temperature t j and with load current i l . refer to page 44 . 5.1.3.2 maximum load inductance during demagnetization of inductive loads, energy must be dissipated in the BTS50010-1TAD. this energy can be calculated with following equation: (5.1) v s v out i l l, r l v s out v ds logic in v in smart clamp r vs gnd v in v out i l v s v s -v ds( cl) t t t t t j t j0 e = v ds(cl) l r l [ v s ? v ds(cl) r l ln ( 1 ? r l i l v s ? v ds(cl) ) + i l ]
data sheet 18 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description following equation simplifies under the assumption of r l = 0 ? . (5.2) the energy, which is converted into heat, is limi ted by the thermal design of the component. see figure 5 for the maximum allowed energy dissipatio n as function of the load current. 5.1.4 switching active loads when switching generative or electr onic loads such as motors or seco ndary ecus which have the ability to feed back voltage disturbances to th e out pins, special attention is requir ed about the resulting absolute and dynamic voltage v ds between vs pin and out pins. to maintain device function ality it is required to limit the maximu m positive or negative slew rate of v ds = v s - v out below |d v ds /dt| (parameter p_4.2.7 ) . in case the device operates at low battery voltage ( v s < v s(nom), min ) where the load feeds back a positive output voltage reaching almost vs potential (0 < v ds < 1 v), it has to be ensured that for each activation (turn-on event), where the device is commanded on by applying v in(h) at in pin, a maximum positive or negative slew rate of v ds below |d v ds /dt| (parameter p_4.2.8 ) will not be exceeded until t on(delay) has expired. also in the case of low v s and low v ds during the rising edge of in, the device might not turn on. figure 11 shows the worst case boundary condition. in such condition, if the device do es not turn on, it will be latched. figure 11 boundary conditions for switching active loads at low v s with low initial v ds voltage . ( not subject to production test, specified by design) for loads that generate steady or dynamic voltage at the out pins which is higher than voltage at vs pin please consider chapter 5.1.5 . e = 1 2 l i l 2 ( 1 ? v s v s ? v ds(cl) ) 0 0.5 1 1.5 2 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9 9.5 vds @ turn-on [v] vs [v]
data sheet 19 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description 5.1.5 inverse current capability in case of inverse current, meaning a voltage v out(inv) at the output higher than the supply voltage v s , a current i l(inv) will flow from output to v s pin via the body diode of the power transistor (please refer to figure 12 ). in case the in pin is high, the power dmos is already ac tivated and will continue to remain in on state during the inverse event. in case, the input goes from ?l? to ?h ?, the dmos will be activa ted even during an inverse event. under inverse condit ion, the device is not overtemperature / overload protected. during inverse mode at on the sense pin will provide a leakage current of less or equal to i is0 . due to the limited speed of inv comparator, the inverse dura tion needs to be limited. figure 12 inverse current circuitry figure 13 inverse behavior - timing diagram out v s v bat i l( in v) ol comp. v out (inv) inv comp. gate dr iver gnd v out v s < t p, in v ,n o f au l t i is i is ( fa u lt ) t off (trip ) internal fault -flag set t t v out v s > t p, in v ,n o f au l t i is t sis(on) t t (a) inverse spike dur ing on -m ode for short times (< t p,inv ,nofault ) ( b) inverse spike during on - m ode for times > t p,inv,nofault v out v s i is t p, n o in v, f au l t t t ( c) inver se spike dur ing on - mode with short cir cuit after leaving inverse m ode i is ( fa u lt ) t pis(fault )
data sheet 20 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description 5.1.6 pwm switching the switching losses during this op eration should be properly consid ered (see following equation): p total = (switching_on_energy + switching_off_energy + i l 2 r ds(on) t dc ) / period pwm switching applic ation slightly above t in(resetdelay) parameter (see figure 26 ) with calculated power dissipation p total > p tot parameter limit causes an effective increase in t j(trip) parameter. in the event of a fault condition it has to be ensured, that the pwm freq uency will not exceed a maximum retry frequency of f fault (parameter p_4.1.9 ). with this measure th e short circuit robustness n rsc1 (parameter p_4.1.4 ) can be utilized. operation at nominal pwm frequenc y can only be restored, once the fault condition is overcome. figure 14 switching in pwm 5.1.7 advanced switch-off behavior in order to reduce device stress when switching off crit ical loads and/or critical load conditions, the device provides an advanced switch off functionality which results in a typica lly ten times faster switch off behavior. this fast switch off functi onality is triggered by on e the following conditions: ? the device is commanded off by applying v in(l) at the in pin. during the switch off operation the out pins? voltage in respect to gnd pin drops to typically -3 v or below (typically v out ? v gnd -3 v). ? the device is commanded on or is already in on-state. the device th en detects a short circuit condition ( i l i cl(0) ) and initiates a protective switch off. please refer to chapter 5.3.6.1 and chapter 5.3.6.2 for details. v in t v in _ h v in _ l t p tot p t dc
data sheet 21 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description 5.2 input pins 5.2.1 input circuitry the input circuitry is compatible with 3.3 v and 5 v microcontrollers or can be directly driven by v s . the concept of the input pin is to react to voltage threshold. with the schmitt trigger, the output is either on or off. figure 15 shows the electrical eq uivalent input circuitry. figure 15 input pin circuitry 5.2.2 input pin voltage the in uses a comparator with hyster esis. the switching on / off takes pl ace in a defined region, set by the threshold v in(l) max and v in(h) min. the exact value where on and off take place depends on the process, as well as the temperature. to avoid cross ta lk and parasitic turn on and off, an hysteresis is implemented. this ensures immunity to noise. 5.3 protection functions the device provides embedded protecti ve functions. integrated protection functions are designed to prevent the destruction of the ic fr om fault conditions described in the data sheet. fault conditions are considered as ?outside? normal operating range. pr otection functions are designed neit her for continuous nor for repetitive operation. figure 16 describes the typical functionality of the diagnosis and protection block. in i in r vs v s gnd
data sheet 22 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description figure 16 diagram of diagnosis & protection block 5.3.1 loss of ground protection in case of loss of module or devi ce ground, where the load remains conn ected to ground, the device protects itself by automatically turning off (when it was prev iously on) or remains off, regardless of the voltage applied at in pin. it is recommended to use input resistors between the microcontroller and the BTS50010-1TAD to ensure switching off of channel. in case of loss of module or device ground, a current ( i out(gnd) ) can flow out of the dmos. figure 17 sketches the situation. figure 17 loss of ground protec tion with external components 5.3.2 protection during loss of load or loss of v s condition in case of loss of load with charged primary inductance s the supply voltage transient has to be limited. it is recommended to use a zener diode, a varistor or v s clamping power switches with connected loads in parallel. the voltage must be limited according to the mi nimum value of the parameter 6.1.33 indicated in table 6 . driver logic rq sq esd protection v s r is cu rrent sense out i is (fa u lt ) is v is i l gnd v b,is inverse comparator vs i is 1 i l >i cl j > j(trip) & in fault v ds (i l /d k il i s ) i is 0 r vs & driver t in(res e t del ay) 30mv ove r- current v s(int) 2v 0 1 & 0 1 v s -v out >3v v bat z (az )g nd r vs v s logic r is r in v in z (az )i s z (e sd -h) in is out gnd z (esd-l)
data sheet 23 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description in case of loss of v s connection with charged inductive loads, a current path with suff icient load current capability has to be provided, to demagnetize the ch arged inductances. it is recommended to protect the device using a zener diode together with a diode ( v z1 + v d1 < 16 v), with path (a) or path (b) as shown in figure 18 . for a proper restart of the device after loss of v s , the input voltage must be de layed compared to the supply voltage ramp up. this can be realized by a capacitor between in and gnd (see figure 31 ). for higher clamp voltages, currents through all pins have to be limite d according to the maximum ratings. please see figure 18 and figure 19 for details. figure 18 loss of v s figure 19 loss of load r vs lo gic r in r is v bat v in v s out in is gnd (a) (b) ext. components acc . to either (a) or (b) required, not both inductive load z 1 d 1 z 1 d 1 r vs logic r in r is v bat v in v s out in is gnd l/r cable r/l cable load z 2
data sheet 24 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description 5.3.3 undervoltage behavior if the device is already on and the powe r supply decreases bu t remains above the v s(uv) , no effect is observed and the device keeps on working normally (case 1, figure 20 ) if the power supply falls below the v s(uv) but remains above the v s(ext,dyn) , the device turns off, but it turns automatically on again when the power supply goes above min. v s(ext) (case 2, figure 20 ). in case the power supply becomes lower than v s(ext,dyn) , the device turns off and can be switched on again only after a reset signal at the in pin, provided that the power supply is higher than min. v s(ext) (case 3, figure 20 ). figure 20 undervoltage behavior min v s( ex t) v s(uv) v s(ext,dyn) 1 2 3 1 always on 2 turn off, automatic turn on when v s min v s(ext) 3 turn off, turn on with in reset with v s min v s(ext)
data sheet 25 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description 5.3.4 overvoltage protection in case v s(sc)_max < v s < v ds(cl) , the device will switch on/off normal ly as in the nominal voltage range. parameters may deviate from the specified limits and li fetime is reduced. this specially impacts the short circuit robustness, as well as the maximum energy e as and e ar the device can handle. the BTS50010-1TAD provides infineon ? smart clamping functionality, which suppresses excessive transient overvoltage by actively clamping th e overvoltage across the power stage and the load. this is achieved by controlling the clamp voltage v ds(cl) depending on the junction temperature t j and the load current i l (see figure 21 for details). figure 21 overvoltage protecti on with external components 5.3.5 reverse polarity protection in case of reverse polarity, the intr insic body diode of the power dmos ca uses power dissipation. to limit the risk of overtemperature, th e device provides infineon ? reversave? functionality. the power in this intrinsic body diode is limited by turning the dmos on. the dmos resistance is then equal to r ds(rev) . additionally, the current into the logic ha s to be limited. the device includes a r vs resistor which limits the current in the diodes. to avoid overcurrent in the r vs resistor, it is nevertheless recommended to use a r in resistor. please refer to maximum current described in chapter 4.1 . figure 22 shows a typical application. r is is used to limit the curre nt in the sense transistor, which behaves as a diode. the recommended typical value for r in is 4.7 k ? and for r is 1k ? . r vs smart clamp r in r is v ba t v in v s out in is gnd z (esd-h) z (a z)is z( az)gnd z (esd-l)
data sheet 26 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description figure 22 reverse polarity protec tion with external components 5.3.6 overload protection in case of overload, high inrush cu rrent or short circuit to ground, the BTS50010-1TAD offers several protection mechanisms. any protective switch of f latches the output. to restart the device, it is necessary to set in = low for t > t in(resetdelay) . this behavior is known as latch behavior. figure 26 gives a sketch of the situation. 5.3.6.1 activation of the switch into short circuit (short circuit type 1) when the switch is activated into short circ uit, the current will raise until reaching the i cl(0) value. after t off(trip) , the device will turn off and latches until the in pin is set to low for t > t in(resetdelay) . under certain supply undervoltage shutdown conditions (for example v s < v s(ext,dyn) ) the latched fault may be reset. for overload (short circuit or overtemperat ure), the maximum retry cycle ( f fault ) under fault condition must be considered. 5.3.6.2 short circuit appearance when the devi ce is already on (short circuit type 2) when the device is in on state and a short circuit to ground appears at the output (sc2) with an overcurrent higher than i cl(0) for a time longer than t off(trip) , the device automatically turns off and latches until the in pin is set to low for t > t in(resetdelay) . under certain supply undervoltage shutdown conditions (for example v s < v s(ext,dyn) ) the latched fault may be reset. 5.3.6.3 influence of the battery wire inductance the wire between the battery and the vs pin in cludes typically some parasitic inductance. when the device switches off due to a short circuit even t, the energy stored in the line inductance together with the capacitance (either the capacitor placed at vs pin or the internal capacitance between drain and source) could trigger an oscillatory behavior on the supply line at short circuit turn-off (see figure 23 ), whose frequency depends on the induct ance and capacitance values. r is -v ba t out - i l - i gnd - i is i in i rvs reverse on micro- controller dout gnd r vs r in v s in is gnd z (esd-h) z (a z)is z( az)gnd z (esd-l)
data sheet 27 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description figure 23 oscillations at vs pin the oscillations can pull the vs pin voltage to gnd or even below. in some cases this behaviour may cause the device to reset the fault generated by the overcurrent event. as conseq uence the device may switch on again, as soon as the vs reaches an adequa te value. the short circuit condition will be detected again and then the device will switch off. short circuits and resets of the fault condition may repeatedly occur (see figure 24 ). figure 24 consecutive short circuit events t i load i cl short circuit detected t v s v bat oscillations of the v s voltage t i load i cl short circuits detected
data sheet 28 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description potential solutions to dampen such oscillation and to achieve an effectively latching overcurrent protection is a rc snubber network, which needs to be connected between the vs pin and device or module gnd. figure 25 shows rc snubber circuits for each gnd connection. fo r detailed information see chapter 7 . figure 25 rc snubber circuits: between vs pin an d module gnd; between vs pin and device gnd the design of the most suitable rc snubber network is beyond the scope of this chapter. nevertheless the recommendation given in chapter 7 contribute to effectively dampen the oscillation for typical line inductance and cvs. 5.3.7 temperature limitation in the power dmos the BTS50010-1TAD incorporates an absolute ( t j(trip) ) temperature sensor. activation of the sensor will cause an overheated channel to switch off to prevent destruction. the device rest arts when the in pin is set to low for t > t in(resetdelay) and the temperature has decreased below t j(trip) - ? t j(trip) . under certain undervoltage shutdown conditions (for example below v s(ext,dyn) ) the latched fault might be reset. in is gnd out vs in is gnd out vs
data sheet 29 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description figure 26 overload protection the current sense exact signal timing can be found in the chapter 5.4 . it is represented here only for device?s behavior understanding. in order to allow the device to dete ct overtemperature conditions and reac t effectively, it is recommended to limit the power dissipation below p tot (parameter 4.1.15). 5.4 diagnostic functions for diagnosis purposes, the BTS50010-1TAD provides a co mbination of digital and an alog signal at pin is. 5.4.1 is pin the BTS50010-1TAD provides an enhanc ed current sense signal called i is at pin is. as long as no ?hard? failure mode occurs (short circuit to gnd / overcu rrent / overtemperatur e) and the condition v is v out - 5 v is fulfilled, a proportional signal to the load current is prov ided. the complete is pin and diagnostic mechanism is described in figure 27 . the accuracy of the sense current depends on temperatur e and load current. in case of failure, a fixed i is(fault) is provided. in order to enable the fault current reporting, the condition v s - v out >2v must be fulfilled. in order to get the fault current in the specified range, the condition v s - v is 5v must be fulfilled. in t i l t i is t 0 i is(fault) t j t t a t j(trip) t off (trip ) start input disable input disable t off ( trip) t in(resetdelay) input disable i is(fault) disable i is(fault) disable i is ( f au l t ) disable short circuit 1 short circuit 2 overtemperature i cl(0) i cl(1)
data sheet 30 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description figure 27 diagnost ic block diagram 5.4.2 sense signal in different operation modes 5.4.3 sense signal in the nominal current range figure 28 and figure 29 show the current sense as function of the load current in the power dmos. usually, a pull-down resistor r is is connected to the current se nse pin is. a typical value is 1 k ? . the dotted curve represents the typical sense cu rrent, assuming a typical d k ilis factor value. the rang e between the two solid curves shows the sense accuracy ra nge that the device is able to provide, at a defined current. (5.3) table 5 sense signal, function of operation mode 1) 1) z = high impedance operation mode input level output level v out diagnostic output (is) 2) 2) see chapter 5.4.3 for current sense range and improved current sense accuracy. normal operation low (off) ~ gnd i is(off) short circuit to gnd gnd i is(off) overtemperature ~ gnd i is(off) short circuit to vs v s i is(off) open load z i is(off) inverse current > v s i is(off) normal operation high (on) ~ v s i is = ( i l / d k ilis ) i is0 overcurrent condition < v s i is = ( i l / d k ilis ) i is0 or i is(fault) short circuit to gnd gnd i is(fault) overtemperature (after the event) ~ gnd i is(fault) short circuit to vs v s i is < i l / d k ilis i is0 open load v s i is0 inverse current > v s < i is0 v s i is(fault) is 0 1 fault z is(az) r vs v s -v out >2v ( i l / d k ilis ) i is(0) & r sensemos i is = i l dk ilis + i is0 with (i is 0)
data sheet 31 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description where the definition of d k ilis is: (5.4) and the definition of i is0 is: (5.5) figure 28 current sense for nominal and overload condition 5.4.3.1 sense signal variation and calibration in some applications, an enhanced accuracy is required around the devi ce nominal current range i l(nom) . to achieve this accuracy requirement, a calibration on the application is possi ble. after two point calibration, the BTS50010-1TAD will have a limited i is value spread at different load curr ents and temperature conditions. the i is variation can be described with the parameters ? (d k ilis(cal) ) and the ? i is0(cal) . the blue solid line in figure 29 is the current sense ratio after the two point calibration at a given temperature. the slope of this line is defined as follows: (5.6) dk ilis = i l4 ? i l1 i is4 ? i is1 i is 0 = i is1 i l1 dk ilis 0 0.5 1 1.5 2 2.5 3 3.5 0 20 40 60 80 100 120 140 160 i is [ma] i l [a] i is0(max) i l1 i l2 i l3 i l4 1 dk ilis(cal) = i is (cal) 2 i is (cal) 1 i l (cal) 2 i l (cal) 1
data sheet 32 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description the offset is defined as follows: (5.7) the bluish area in figure 29 is the range where the current sense ra tio can vary across temperature and load current after performing the calibration. the accuracy of the load cu rrent sensing is improved and, given a sense current value i is (measured in the application), the load curr ent can be calculated as follow, using the absolute value for ? (d k ilis(cal) ) instead of % values: (5.8) where d k ilis(cal) is the current sense ratio measured af ter two-points calibr ation (defined in equation (5.6) ), i is0(cal) is the current sense offset (calcula ted after two points calibration, see equation (5.7) ), and ? i is0(cal) is the additional variation of the individual offset over life time and temperature. for a calibration at 25c ? i is0(cal) varies over temperature and life time for all positive ? i is0(cal) within the differences of the temperature dependent max. limits. all negative ? i is0(cal) vary within the differences of the temperature dependent min. limits. for positive i is0(cal) values ( i is0(cal) >0): (5.9) for negative i is0(cal) values ( i is0(cal) <0): (5.10) equation (5.8) actually provides four solutions for load current, considering that ? (d k ilis(cal) ) and ? i is0(cal) can be both positive and ne gative. the load current i l for any sense current i is will spread between a minimum i l value resulting from the combination of lowest ? (d k ilis(cal) ) value and highest ? i is0(cal) and a maximum i l value resulting from the combination of highest ? (d k ilis(cal) ) value and lowest ? i is0(cal) . i is0(cal) = i is(cal)1 ? i l(cal)1 dk ilis(cal) = i is(cal)2 ? i l(cal)2 dk ilis(cal) i l = dk ilis(cal) ( 1 + ?(dk ilis(cal) ) ) ( i is ? i is0(cal) ?i is0(cal) ) max i is0 (@t j = 150c) ? a 0 ( ) 0(cal) a 0 ( 0) ? a 0 ( ) 0 ( 0) ? 0 ( ) 0(cal) 0 ( 0) ? 0 ( )
data sheet 33 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description figure 29 improved current sense ac curacy after 2-point calibration i is i l 1/dk ilis(min) 1/dk ilis(max) 1/dk ilis(cal) i is0(cal) dk ilis(cal) dk ilis(cal) i is0(cal) i is0(cal) i l(cal)1 i l(cal)2 i is(cal)1 i is(cal)2 i is min i l max i l typ i l
data sheet 34 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch functional description 5.4.3.2 sense signal timing figure 30 shows the timing during settl ing and disabling of the sense. figure 30 fault acknowledgement 5.4.3.3 sense signal in ca se of short circuit to v s in case of a short circuit between out and vs, a major part of the load current wi ll flow through the short circuit. as a result, a lower curren t compared to the nominal operation will flow through the dmos of the BTS50010-1TAD, which can be recogniz ed at the current sense signal. 5.4.3.4 sense signal in case of over load an over load condition is defined by a current flow ing out of the dmos reaching the current over load i cl or the junction temperature reaches the thermal shutdown temperature t j(trip) . please refer to chapter 5.3.6 for details. in that case, the sense signal will be in the range of i is(fault) when the in pin stays high. this is a device with latch functionality. the state of the device will remain and the sense signal will remain on i is(fault) until a reset signal comes from the in pin. for example, when a thermal sh utdown occurs, even when the over temperature condition has di sappeared, the dmos can only be reac tivated when a reset signal is sent to the in pin. t t t t v in sh ort / overt emp. v out i is i is 1 .. 4 i is(fault) latch no reset reset t of f < t in(resetd el ay) t of f > t in(resetd el ay) 3v i is(fault) i is 1 .. 4 t t t t v in sh ort circuit v out i is v out i l i is t on 90% of i l static t s is(o n) 90% of i s static t pis(o n)_90 v in t t t t t pis(fau lt) t s is(l c)
data sheet 35 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch electrical characteristics BTS50010-1TAD 6 electrical characteristics BTS50010-1TAD 6.1 electrical characteristics table table 6 electrical charac teristics: BTS50010-1TAD v s = 8 v to 18 v, t j = -40c to +150c (unles s otherwise specified) for a given temperature or voltage rang e, typical values are specified at v s = 13.5 v, t j = 25c parameter symbol values unit note or test condition number min. typ. max. operating and standby currents operating current (channel active) i gnd(active) ?1.23ma v in 2.2 v p_6.1.1 standby current for whole device with load i vs(off) ?818a 1) v s =18v v out =0v v in 0.8 v t j 85c see page 41 p_6.1.2 maximum standby current for whole device with load i vs(off) ? 22 130 a v s =18v v out =0v v in 0.8 v t j 150c see page 41 p_6.1.3 power stage on-state resistance in forward condition r ds(on) ?1.62.0m ? i l = 150 a v in 2.2 v t j = 150c see page 42 p_6.1.4 on-state resistance in forward condition, low battery voltage r ds(on) ?23.2m ? i l =20a v in 2.2 v v s =5.5v t j = 150c see page 42 p_6.1.5 on-state resistance in forward condition r ds(on) ?1.0?m ? 1) i l = 150 a v in 2.2 v t j = 25c see page 42 p_6.1.6 on-state resistance in inverse condition r ds(inv) ?1.62.1m ? i l = -150 a v in 2.2 v t j = 150c see figure 12 p_6.1.7 on-state resistance in inverse condition r ds(inv) ?1.0?m ? 1) i l = -150 a v in 2.2 v t j = 25c see figure 12 p_6.1.8
data sheet 36 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch electrical characteristics BTS50010-1TAD nominal load current i l(nom) 40 48 ? a t a = 85c 2) t j 150c p_6.1.9 drain to source smart clamp voltage v ds(cl) = v s - v out v ds(cl) 28 ? 46 v i ds =50ma see page 44 p_6.1.11 output leakage current i l(off) ?315a 1) v in 0.8 v v out =0v t j 85c p_6.1.13 output leakage current i l(off) ? 20 110 a v in 0.8 v v out =0v t j = 150c p_6.1.14 turn on slew rate v out = 25% to 50% v s d v on /d t 0.05 0.23 0.5 v/s r l =0.5 ? v s = 13.5 v see figure 8 see page 42 p_6.1.15 turn off slew rate v out = 50% to 25% v s -d v off /d t 0.05 0.25 0.55 v/s p_6.1.16 turn on time to v out = 90% v s t on ? 175 700 s p_6.1.17 turn off time to v out = 10% v s t off ? 315 735 s p_6.1.18 turn on time to v out = 10% v s t on(delay) ? 60 150 s p_6.1.19 turn off time to v out = 90% v s t off(delay) ? 230 520 s p_6.1.20 switch on energy e on ?7?mj 1) r l =0.5 ? v s = 13.5 v see page 43 p_6.1.21 switch off energy e off ?5?mj 1) r l =0.5 ? v s = 13.5 v see page 43 p_6.1.22 table 6 electrical charac teristics: BTS50010-1TAD (cont?d) v s = 8 v to 18 v, t j = -40c to +150c (unles s otherwise specified) for a given temperature or voltage rang e, typical values are specified at v s = 13.5 v, t j = 25c parameter symbol values unit note or test condition number min. typ. max.
data sheet 37 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch electrical characteristics BTS50010-1TAD input pin low level input voltage v in(l) ? ? 0.8 v see page 44 p_6.1.23 high level input voltage v in(h) 2.2 ? ? v see page 44 p_6.1.24 input voltage hysteresis v in(hys) ? 200 ? mv 1) p_6.1.25 low level input current i in(l) 8??a v in =0.8v p_6.1.26 high level input current i in(h) ??80a v in 2.2 v p_6.1.27 protection: loss of ground output leakage current while module gnd disconnected i out(gnd_m) 0 20 110 a 1)3) v s =18v v out =0v is a in pins open gnd pin open t j = 150c see figure 17 p_6.1.28 output leakage current while device gnd disconnected i out(gnd) 0 20 110 a v s =18v gnd pin open v in 2.2 v 1k ? pull down from is to gnd 4.7 k ? to in pin t j = 150c see figure 17 see page 45 p_6.1.29 protection: reverse polarity on-state resistance in reverse polarity r ds(rev) ??2.2m ? v s =0v v gnd = v in =16v i l =-20a t j = 150c see figure 22 p_6.1.30 on-state resistance in reverse polarity r ds(rev) ?1.1?m ? 1) v s =0v v gnd = v in =16v i l =-20a t j = 25c see page 45 p_6.1.31 integrated resistor r vs ?6090 ? t j = 25c p_6.1.32 table 6 electrical charac teristics: BTS50010-1TAD (cont?d) v s = 8 v to 18 v, t j = -40c to +150c (unles s otherwise specified) for a given temperature or voltage rang e, typical values are specified at v s = 13.5 v, t j = 25c parameter symbol values unit note or test condition number min. typ. max.
data sheet 38 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch electrical characteristics BTS50010-1TAD protection: overvoltage overvoltage protection v s to gnd pin v s(az)_gnd 64 70 80 v see figure 21 see page 44 p_6.1.33 overvoltage protection v s to is pin v s(az)_is 64 70 80 v gnd and in pin open see figure 21 see page 44 p_6.1.34 protection: overload current trip de tection level i cl(0) 150 190 ? a v s = 13.5 v, static t j = 150c see figure 26 p_6.1.35 i cl(0) 160 200 ? a v s = 13.5 v, static t j = -40 ... 25c see figure 26 current trip maximum level i cl(1) ? 220 270 a 1) v s = 13.5 v d i l /d t =1a/s see page 45 overload shutdown delay time t off(trip) ?16?s 1) p_6.1.36 thermal shutdown temperature t j(trip) 150 170 1) 200 1) c see figure 26 p_6.1.37 thermal shutdown hysteresis ? t j(trip) ?10?k 1) p_6.1.38 diagnostic function: sense pin sense signal current in fault condition i is(fault) 3.5 6 8 ma 1) v in =4.5v v s - v is 5v p_6.1.40 sense signal saturation current i is(lim) 3.5 6 8 ma 1) v in =4.5v v s - v is 5v p_6.1.57 table 6 electrical charac teristics: BTS50010-1TAD (cont?d) v s = 8 v to 18 v, t j = -40c to +150c (unles s otherwise specified) for a given temperature or voltage rang e, typical values are specified at v s = 13.5 v, t j = 25c parameter symbol values unit note or test condition number min. typ. max.
data sheet 39 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch electrical characteristics BTS50010-1TAD diagnostic function: current sense ratio signal in the nominal area, stable current load condition current sense differential ratio d k ilis 44500 52100 59100 ? i l4 = 150 a i l1 =20a see equation (5.4) p_6.1.41 calculated sense offset current i l = i l0 =0a i is0 -235 20 274 a 4) v in 2.2 v v s - v is 5v t j = -40c see figure 28 p_6.1.42 i is0 -162 8 180 a 1)4) v in 2.2 v v s - v is 5v t j = 25c see figure 28 i is0 -88 -4 80 a 4) v in 2.2 v v s - v is 5v t j = 150c see figure 28 sense current i l = i l1 =20a i is1 103 392 702 a v in 2.2 v v s - v is 5v see figure 28 p_6.1.43 sense current i l = i l2 =40a i is2 442 776 1131 a 1) v in 2.2 v v s - v is 5v see figure 28 p_6.1.44 sense current i l = i l3 =80a i is3 1.12 1.54 1.99 ma 1) v in 2.2 v v s - v is 5v see figure 28 p_6.1.45 sense current i l = i l4 = 150 a i is4 2.30 2.89 3.49 ma v in 2.2 v v s - v is 5v see figure 28 p_6.1.46 current sense ratio spread between -40c and 25c for repetitive operation ? (d k ilis(cal)(-40c) )-3 ? 4.5% 1) d k ilis(cal)( - 40c) / d k ilis(cal)(25c) ) see figure 29 see page 46 p_6.1.12 current sense ratio spread between 150c and 25c for repetitive operation ? (d k ilis(cal)(150c) )-8.5? -3 % 1) d k ilis(cal)(150c) / d k ilis(cal)(25c) ) see figure 29 see page 46 p_6.1.39 table 6 electrical charac teristics: BTS50010-1TAD (cont?d) v s = 8 v to 18 v, t j = -40c to +150c (unles s otherwise specified) for a given temperature or voltage rang e, typical values are specified at v s = 13.5 v, t j = 25c parameter symbol values unit note or test condition number min. typ. max.
data sheet 40 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch electrical characteristics BTS50010-1TAD diagnostic function: diagnostic timing in normal condition current sense propagation time until 90% of i is stable after positive input slope on in pin t pis(on)_90 0 ? 700 s v in 2.2 v v s = 13.5 v r l =0.5 ? see figure 30 p_6.1.48 current sense settling time to i is stable after positive input slope on in pin t sis(on) ? ? 3000 s v in 2.2 v v s = 13.5 v r l =0.5 ? see figure 30 p_6.1.49 i is leakage current when in disabled i is(off) 00.051a v in 0.8 v r is =1k ? p_6.1.50 current sense settling time after load change t sis(lc) ?50?s 1) v in 2.2 v d i l /d t =0.4a/s p_6.1.51 diagnostic function: diagnostic timing in overload condition current sense propagation time for short circuit detection t pis(fault) 0 ? 100 s 1) v in 2.2 v from v out = v s - 3v to i is(fault)_min see figure 30 p_6.1.52 delay time to reset fault signal at is pin after turning off v in t in(resetdelay) 250 1000 1500 s 1) p_6.1.53 timing: inverse behavior propagation time from v out > v s to fault disable t p,inv,nofault ?4?s 1) see figure 13 p_6.1.55 propagation time from v out < v s to fault enable t p,noinv,fault ?10?s 1) see figure 13 p_6.1.56 1) not subject to production test, specified by design. 2) value is calculated from the parameters typ. r thja(2s2p) , with 65 k temperature increase, typ. and max. r ds(on) . 3) all pins are disconnected except v s and out. 4) value is calculated from the parameters d k ilis and i is1 . table 6 electrical charac teristics: BTS50010-1TAD (cont?d) v s = 8 v to 18 v, t j = -40c to +150c (unles s otherwise specified) for a given temperature or voltage rang e, typical values are specified at v s = 13.5 v, t j = 25c parameter symbol values unit note or test condition number min. typ. max.
data sheet 41 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch electrical characteristics BTS50010-1TAD 6.2 typical performance characteristics standby current for whol e device with load, i vs(off) = f ( v s , t j ) standby current for whole device with load, i vs(off) = f ( t j ) at v s = 13.5 v gnd leakage current i gnd(off) = f ( v s , t j ) gnd leakage current i gnd(off) = f ( t j ) at v s = 13.5 v 0 5 10 15 20 25 30 35 0 5 10 15 20 25 30 i vs(off) [a] v s [v] -40c 0c 25c 85c 100c 125c 150c 0 2 4 6 8 10 12 14 16 18 20 -40-20 0 20406080100120140 160 i vs(off) [a] t j [ c] 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 5 10 15 20 25 30 i gnd(off) [a] v s [v] -40c 0c 25c 85c 100c 125c 150c 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 -40-20 0 20406080100120140160 i gnd(off) [a] t j [ c]
data sheet 42 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch electrical characteristics BTS50010-1TAD on state resistance r ds(on) = f ( v s , t j ), i l = 20 a ... 150 a on state resistance r ds(on) = f ( t j ), v s = 13.5 v, i l = 20 a ... 150 a turn on time t on = f ( v s , t j ), r l = 0.5 ? turn off time t off = f ( v s , t j ), r l = 0.5 ? 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 5 10 15 20 25 30 r ds(on) [m ? ] v s [v] -40c 25c 150c 0.0 0.5 1.0 1.5 2.0 -40-20 0 20406080100120140160 r ds(on) [m ? ] t j [ c] 0 200 400 600 800 1000 0 5 10 15 20 25 30 t on [s] v s [v] -40c 25c 150c 0 200 400 600 800 1000 0 5 10 15 20 25 30 t off [s] v s [v] -40c 25c 150c
data sheet 43 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch electrical characteristics BTS50010-1TAD slew rate at turn on d v on / d t = f ( v s , t j ), r l = 0.5 ? slew rate at turn off d v off / d t = f ( v s , t j ), r l = 0.5 ? switch on energy e on = f ( v s , t j ), r l = 0.5 ? switch off energy e off = f ( v s , t j ), r l = 0.5 ? 0.0 0.1 0.2 0.3 0.4 0.5 0 5 10 15 20 25 30 d v on /dt [v/s] v s [v] -40c 25c 150c 0.0 0.1 0.2 0.3 0.4 0.5 0 5 10 15 20 25 30 d v off /dt [v/s] v s [v] -40c 25c 150c 0 10 20 30 40 50 60 0 5 10 15 20 25 30 e on [mj] v s [v] -40c 25c 150c 0 10 20 30 40 50 60 0 5 10 15 20 25 30 e off [mj] v s [v] -40c 25c 150c
data sheet 44 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch electrical characteristics BTS50010-1TAD drain to source clamp voltage v ds(cl) = f ( t j ), i l = 50 ma overvoltage protection v s(az)_gnd = f ( t j ), v s(az)_is = f ( t j ) low level input voltage v in(l) = f ( v s , t j ) high level input voltage v in(h) = f ( v s , t j ) 30 32 34 36 38 40 42 44 -40-20 0 20406080100120140160 v ds(cl) [v] t j [ c] 60 62 64 66 68 70 72 74 76 78 80 -40-20 0 20406080100120140160 v s(az)_gnd , v s(az)_is [v] t j [ c] 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0 5 10 15 20 25 30 v in(l) [v] v s [v] -40c 25c 150c 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0 5 10 15 20 25 30 v in(h) [v] v s [v] -40c 25c 150c
data sheet 45 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch electrical characteristics BTS50010-1TAD output leakage current while device gnd disconnected, i out(gnd) = f ( v s , t j ) overload detection current i cl(1) = f (d i l /d t , t j ), v s = 13.5 v resistance in reversave? r ds(rev) = f ( v s , t j ), i l = -150 a resistance in reversave? r ds(rev) = f ( v s , t j ), i l = -20 a 0 5 10 15 20 25 30 35 40 0 5 10 15 20 25 30 i out(gnd) [a] v s [v] -40c 25c 150c 0 50 100 150 200 250 300 350 400 0246810 i cl(1) [a] d i l /d t [a/sec] -40c 25c 150c 0.0 0.5 1.0 1.5 2.0 2.5 3.0 468101214 16 r ds(rev) [m] v s [v] -40c 25c 150c 0.0 0.5 1.0 1.5 2.0 2.5 3.0 468101214 16 r ds(rev) [m] v s [v] -40c 25c 150c
data sheet 46 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch electrical characteristics BTS50010-1TAD input current i in = f ( t j ); v s = 13.5 v; v in(l) = 0.8v; v in(h) = 5.0 v input current i in(h) = f ( v in , t j ); v s = 13.5 v gnd current i gnd(active) = f ( v s , t j ); v in = 2.2 v current sense differential ratio d k ilis = f ( t j ) 0 10 20 30 40 50 60 -40-20 0 20406080100120140160 i in [a] t j [ c] i_in_l i_in_h 0 10 20 30 40 50 60 70 02468101214 i in [a] v in [v] -40c 25c 150c 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 5 10 15 20 25 30 i gnd(active) [ma] v s [v] -40c 25c 150c 45 47 49 51 53 55 -50 0 50 100 150 d k ilis t j [ c]
data sheet 47 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch application information 7 application information note: the following information is given as a hint for the implementation of the device only and shall not be regarded as a description or wa rranty of a certain func tionality, condition or quality of the device. figure 31 application diag ram with BTS50010-1TAD note: this is a very simplified example of an applicatio n circuit. the function must be verified in the real application. gpio a/d in vss vdd micro controller in is gnd out vs v bat c sense r/l cable c out r is_prot r gnd v dd c vs z a z b c s r s r/l cable load (a) (b) ext. components acc. to either (a) or (b) required, not both c in r is r in
data sheet 48 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch application information 7.1 further application information ? please contact us for information regarding the pin fmea ? for further information you may contact http://www.infineon.com/ table 7 bill of material reference value purpose r gnd 4 ? resistor of rc snubber network option b, damps possible oscillation of the vs pin voltage in combination with c vs r in 4.7 k ? protection of the microcontroller du ring overvoltage, reverse polarity allows BTS50010-1TAD channels off during loss of ground r is 1k ? sense resistor r is_prot 4.7 k ? protection of the microcon troller during overvoltage protection of the BTS50010-1TAD during reverse polarity r s 3.9 ? resistor of rc snubber network option a, damps possible oscillation of the vs pin voltage with improved emc behavior z a zener diode protection of the BTS50010-1TAD du ring loss of load with primary charged inductance, see chapter 5.3.2 z b zener diode protection of the BTS50010-1TAD during loss of battery or against huge negative pulse at out (like iso pulse 1), see chapter 5.3.2 c sense 10 nf sense signal filtering c vs 100 nf improved emc behavior (in layout, pls. place close to the pins) c out 10 nf improved emc behavior (in layout, pls. place close to the pins) c in 150 nf BTS50010-1TAD tends to latched sw itch-off due to short negative transients on supply pin; c in automatically resets the device c s 4.7 f capacitor of rc snubber network op tion a, damps possible oscillation of the vs pin voltage with improved emc behavior
data sheet 49 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch package outlines 8 package outlines figure 32 pg-to-263-7-10 (rohs-compliant) green product (rohs compliant) to meet the world-wide customer requirements for en vironmentally friendly products and to be compliant with government regulations the device is available as a green product. green products are rohs-compliant (i.e. pb-free finish on leads and suitable for pb -free soldering according to ipc/jedec j-std-020). dimensions in mm for further info rmation on alternative pa ckages, please visit our website: http://www.infineon.com/packages . dimensions in mm
data sheet 50 rev. 1.1 2017-03-30 BTS50010-1TAD smart high-side power switch revision history 9 revision history revision date changes 1.1 2017-03-30 chapter ?5.1.4?: add ?no turn on? graph update footnote 8) page 11 1.0 2016-09-16 data sheet created from preliminary data sheet.
trademarks of infineon technologies ag hvic?, ipm?, pfc?, au-convertir?, aurix? , c166?, canpak?, cipos?, cipurse?, cooldp ?, coolgan?, coolir?, coolmos?, coolset?, coolsic?, dave?, di-pol?, directfet?, drblade?, easypim?, econobridge?, ec onodual?, econopack?, econopim?, eicedriver?, eupec?, fcos?, ga npowir?, hexfet?, hitfet?, hybridpack?, imotion?, iram?, isoface?, isopack?, ledrivir?, li tix?, mipaq?, modstack?, my-d?, novalithic?, o ptiga?, optimos?, origa?, powiraudio?, powirstage?, primepack?, primestack?, pr ofet?, pro-sil?, rasic?, real 3?, smartlewis?, solid flas h?, spoc?, strongirfet?, supirbuck?, tempfet?, trenchstop?, tricore?, uhvic?, xhp?, xmc?. trademarks updated november 2015 other trademarks all referenced product or service names and trademarks are the proper ty of their respective owners. edition 2017-03-30 published by infineon technologies ag 81726 munich, germany ? 2017 infineon technologies ag. all rights reserved. do you have a question about any aspect of this document? email: erratum@infineon.com important notice the information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("beschaffenheitsgarantie"). with respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, infineon technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. in addition, any information given in this document is subject to customer's comp liance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer's products and any use of the product of infineon technologies in customer's applications. the data contained in this document is exclusively intended for technically trained staff. it is the responsibility of customer's technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements products may contain dangerous substances. for information on the types in question please contact your nearest infineon technologies office. except as otherwise explicitly approved by infineon technologies in a written document signed by authorized representatives of infineon technologies, infineon technologies? products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. please read the important notice and warnings at the end of this document

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